smt - Z3 Solving verilog assign statement -


i ran below code in z3 (java api):

bitvecexpr = ctx.mkbvconst("a",8); bitvecexpr b = ctx.mkbvconst("b",8); bitvecexpr c = ctx.mkbvconst("c",8); bitvecexpr d = (bitvecnum) ctx.mknumeral("11",ctx.mkbitvecsort(8)); solver s = ctx.mksolver(); s.add(ctx.mkeq(c,ctx.mkbvxor(a,b))); s.add(ctx.mkeq(c,d));    model m = s.getmodel(); system.out.println("m.eval(a) " + m.eval(a,false)); /*m.eval(a) 0 */ system.out.println("m.eval(b) " + m.eval(b,false));  /*m.eval(b) 11 */ system.out.println("m.eval(c) " + m.eval(c,false));  /*m.eval(c) 11 */

my questions are:

  1. how pass hexadecimal value d? take decimal value?

  2. is there other way pass bit value d?


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